Document Type : Reseach Article

10.57647/j.mjee.2024.1802.36

Abstract

This article describes the use of a sliding mode controller (SMC) in conjunction with an integral (PI) controller for a MLI based DSTATCOM to balance dc side voltage, control a cascaded H-bridge inverter, and compensate for power quality issues related to current harmonics. Several benefits come with using SMC for DSTATCOMDC link voltage regulation, including a decrease in switching ripple in the DC side voltage and a steady DC side capacitor voltage under dynamic conditions. A DSTATCOM based CHBMLI supplying three phase loads is used to implement the SMC algorithm. When using the suggested dc link voltage balancing method, the DSTATCOM characteristics perform satisfactorily in terms of voltage balancing and the removal of power quality issues such current harmonics. Additionally, the DSTATCOM's improved voltage balancing (IVB) scheme is used to compare the performance of the PI controller with the SMC's improved voltage balancing method. The real-time investigation validates the performance characteristics, and the enhanced voltage balancing scheme of SMC results in better transient and steady state response. 

Keywords

[1] M. Rawa, M. D. Siddique, S. Mekhilef, N. Mohamed
Shah, H. Bassi, M. Seyedmahmoudian, and A. Stojcevski. “Dual input switched-capacitor-based
single-phase hybrid boost multilevel inverter topology with reduced number of components.”. IET
Power Electronics, 13(4):pp. 881–891, 2020.
[2] Y. Hinago and H. Koizumi. “A single-phase multilevel inverter using switched series/parallel dc
voltage sources.”. IEEE Transactions on Industrial
Electronics, 57(8):pp. 2643–2650, 2009.[3] M. D. Siddique, S. Mekhilef, N. M. Shah, and M. A.
Memon. “Optimal design of a new cascaded multilevel inverter topology with reduced switch count.”.
IEEE Access, 7:pp. 24498–24510, 2019.
[4] M. D. Siddique, S. Mekhilef, N. M. Shah, A. Sarwar,
A. Iqbal, M. Tayyab, and M. K. Ansari. “Low switching frequency based asymmetrical multilevel inverter topology with reduced switch count.”. IEEE
Access, 7:pp. 86374–86383, 2019.
[5] C. Dhanamjayulu, G. Arunkumar, B. Jaganatha Pandian, and S. Padmanaban. “Design and implementation of a novel asymmetrical multilevel inverter optimal hardware components.”. International Transactions on Electrical Energy Systems, 30(2):pp. 12201,
2020.
[6] M. Saeedian, J. Adabi, and S. M. Hosseini.
“Cascaded multilevel inverter based on symmetric–asymmetric DC sources with reduced number
of components.”. IET Power Electronics, 10(12):pp.
1468–1478, 2017.
[7] M. Jayabalan, B. Jeevarathinam, and T. Sandirasegarane. “Reduced switch count pulse width
modulated multilevel inverter.”. IET Power Electronics, 10(1):pp. 10–17, 2017.
[8] M. Farhadi Kangarlu and E. Babaei. “Cross-switched
multilevel inverter: an innovative topology.”. IET
Power Electronics, 6(4):pp. 642–651, 2013.
[9] A. Moharana and P. K. Dash. “Input-output linearization and robust sliding-mode controller for
the VSC-HVDC transmission link. ”. IEEE Transactions on Power Delivery, 25(3):pp. 1952–1961, 2010.
[10] B. Xiao, L. Hang, J. Mei, C. Riley, L. M. Tolbert, and
B. Ozpineci. “Modular cascaded H-bridge multilevel PV inverter with distributed MPPT for gridconnected applications.”. IEEE Transactions on Industry Applications, 51(2):pp. 1722–1731, 2014.
[11] L. Ben-Brahim, A. Gastli, M. Trabelsi, K. A. Ghazi,
M. Houchati, and H. Abu-Rub. “Modular multilevel converter circulating current reduction using
model predictive control.”. IEEE Transactions on
Industrial Electronics, 63(6):pp. 3857–3866, 2016.
[12] A. Inoue, M. Deng, K. Matsuda, and B. Bandyopadhyay. “Design of a robust sliding mode controller using multirate output feedback.”. IEEE International
Conference on Control Applications, :pp. 200–203,
2007.
[13] D. Suresh and S. P. Singh. “Type-2 fuzzy logic
controlled three-level shunt active power filter for
power quality improvement.”. Electric Power Components and Systems, 44(8):pp. 873–882, 2016.