Document Type : Review Article

Authors

Department of Electrical Engineering, Najafabad Branch, Islamic Azad University, Najafabad, Iran

Abstract

In this paper, an optical communication receiver system for 5Gbps applications is proposed concerning power consumption. An inductor-less circuit in three-stages is proposed as the trans-impedance amplifier (TIA), which benefits from the inherent low input resistance of a common gate topology as the first stage. By forming two zeros in this TIA, proper frequency response is obtained while the DC current is reduced. In order to obtain extra gain for the receiver system, three stages of a conventional limiting amplifier (LA) are used. In order to verify the circuit performance, the proposed receiver is simulated in HSPICE using 90nm CMOS technology parameters. The receiver is mathematically studied and is matched with the simulations. Simulations, such as eye-diagram, noise analysis and fabrication process analysis (Monte-Carlo) are done in this paper. The proposed TIA shows 53.9dbΩ trans-impedance gain, 3.5GHz bandwidth, 15.2pA/√Hz and only 1.52mw power consumption for 1.2v supply voltage, and the receiver system shows 90.9dbΩ, 3.5GHz bandwidth and 6.34mw power consumption (for 2stages of TIA and 3stages of LA) for 1.2v supply voltage. Results indicate that the proposed receiver is suitable to work as a low-power 5Gbps optical communication receiver system.

Keywords

[1] B. Razavi, “Design of integrated circuits for optical communications” , Wiley series in lasers and applications , 2nd edition, 2003.
[2] F. Aznar, S. Celma and B. Calvo, “CMOS Receiver Front-Ends for Giga-bit short-range optical Communications”, Springer Science+Business Media New York, 2013.
[3] C. Li and S. Palermo, “A Low-Power 26GHz Transformer-based Regulated Cascode SiGe BiCMOS Trans-impedance Amplifier”, IEEE Journal of Solid-State Circuits, Vol. 48, No. 5, pp. 1264-1275, 2013.
[4] D. Li, G. Minoia, etc., “A Low Noise Design Technique for High Speed CMOS Optical Receivers”, IEEE Journal of Solid State Circuits, 2014, Vol. 49, No. 6, pp. 1437-1446.
[5] B. Nakhkoon and H. M. Mostafa, “ A 5Gb/s Noise Optimized receiver Using a Switched TIA for Wireless Optical Communications”, IEEE Transactions on Circuits and Systems, 2014, Vol. 61, No. 4, pp. 1255-1268.
[6] Y. H. Chien, K. L. Fu, Sh. Liu, “A 3-25Gb/s Four Channel Receiver with Noise-Cancellation TIA and Power Scalable LA”, IEEE Transactions on Circuits and Systems-II, 2014, Vol. 61, No.11, pp. 845-849.
[7] S. Galal, and B. Razavi, “10Gb/s limiting amplifier and laser/modulator driver in 0.18um CMOS technology”, Digest of IEEE ISSCC, pp. 188-189, 2003.
[8] Ch. Wu, Ch. Lee, W. Chen, and Sh. Liu, “ CMOS Wideband amplifier using multiple inductive-series peaking technique”, IEEE journal of solid-state Circuits, Vol.40, pp. 548-552, 2005.
[9] M. Sanduleanu and E. Stikvoort, “Inductor-less 10Gb/s limiter with 10mv sensitivity and offset/temperature compensation in baseline CMOS18”, Proc. Of the 29th European Solid-State circuits conference, pp.153-156, 2003.
[10] M. Atef and H. Zimmerman, “Low Power 10Gb/s Inductor-less Inverter based Common-drain Active feedback Trans-impedance Amplifier in 40nm CMOS”, Springer Analog Integrated Circuits and Signal processing, 2013, Vol. 76, No. 3, pp. 367-376.
[11] Zh. Lu, K. Yeo, W. M. Lim, M. A. Do and Ch. Boon, “Design of a CMOS Broadband Trans-impedance Amplifier with Active Feedback”, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2010, Vol. 18, No. 3. Pp. 461-470.
[12] M. Seifourid, P. Amiri and M. Rakide, “Design of broadband Trans-impedance Amplifier for Optical Communication Systems”, Elsevier Microelectronics Journal, 2015, Vol. 46, pp. 679-684.
[13] B. Razavi , "Design of Analog CMOS Integrated Circuits " , MacGraw – Hill Series in Electrical and Computer Engineering, 2002.
[14] S. Galal and B. Razavi, “Broadband ESD protection circuit in CMOS technology” Digest of IEEE ISSCC, pp. 182-183, 2003.
[15] Ch. Ta Chan, and O. T-C Chen, “Inductor-less 10Gb/s CMOS Transimpedance Amplifier Using Source-follower Regulated Cascode and Double Three-order Active Feedback”, IEEE International Symposium on Circuits and Systems, pp. 5487-5489, 2006.
[16] M. Atef and H. Zimmerman, “Optical Receiver Using Noise Cancelling with an Integrated Photodiode in 40nm CMOS Technology”, IEEE Transactions on Circuits and Systems, 2013, Vol. 60, No. 7, pp. 1929-1936.
[17] M. Atef and H. Zimmermant, “2.5Gbit/s Trans-impedance Amplifier using noise cancelling for Optical Receivers”, in IEEE International Symposium on circuits and Systems (ISCAS), 2012, pp. 1740-1743.
[18] W. Chen, Y. Cheng and D. Lin. “ A 1.8v 10Gbps Fully Integrated CMOS Optical Receiver Analog Front End”, IEEE Journal of Solid State Circuits, Vol. 40, pp.3904-3907, 2007.