Amin Emanian; Ehsan Daryabeigi; Morteza Asadi Zeidabadi
Volume 6, Issue 4 , November 2012
Abstract
In designing a parallel resonant induction heating system, choosing a proper capacitance for the resonant circuit is quite important. The capacitance affects the resonant frequency, output power, heating efficiency and power factor. In this paper, with consideration to function of the equivalent series ...
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In designing a parallel resonant induction heating system, choosing a proper capacitance for the resonant circuit is quite important. The capacitance affects the resonant frequency, output power, heating efficiency and power factor. In this paper, with consideration to function of the equivalent series resistance (ESR), optimal capacitance is calculated. The induction heating resonance capacitor is achieved using Smart Bacteria Foraging Algorithm (SBFA) under voltage and frequency constraints for minimizing cost function that is including: increasing the output power and efficiency of an induction heater, while decreasing the power loss of the capacitor. The proposed algorithm mimics chemotactic behavior of E.Coli bacteria to optimize parameters. The proposed algorithm enjoys individual and social intelligence, so that it can search influx ways among hidden layers of the problem. Based on the equivalent circuit model of an induction heating system, the output power, and the capacitor losses are calculated. The effectiveness of the proposed method is verified by computer simulations, also improving the obtained results using SBFA are compared to classical bacteria foraging algorithm BFA.
Parastoo Razavi; Reza Berangi
Volume 6, Issue 4 , November 2012
Abstract
Cognitive radio is a revolutionary technology that made significant progress in the effective use of the frequency spectrum. The technology itself can be dynamically adjusted so that the proper utilization of the available radio spectrum can be made. According to various studies conducted, it is observed ...
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Cognitive radio is a revolutionary technology that made significant progress in the effective use of the frequency spectrum. The technology itself can be dynamically adjusted so that the proper utilization of the available radio spectrum can be made. According to various studies conducted, it is observed that the bulk of each frequency band allocated to users leaving unused. The cognitive radio can use these parts of the spectrum that called spectrum holes. Inherent nature of this technology creates the chance for the attacker in these networks. This vulnerability that created due to the inherent nature of cognitive radio technology, Can severely impact on the safety and quality of service in these networks. In this paper, we focus on the primary user emulation attack. In this attack, an adversary transmits signals whose characteristics emulate those of incumbent signals. We proposed the method for reducing the effects of primary user emulation attacks in cognitive radio networks. This method suggests the technique that can merge with spectrum sensing method and can resistant these networks against the primary user emulation attacks. Finally, with run some simulation, we examined the performance of this proposed method in detection of primary user emulation attacks in these networks.
Ali Farmani; Hossein Balazadeh Bahar
Volume 6, Issue 4 , November 2012
Abstract
This paper describes the implementation of a low power and high-speed encryption algorithm with high throughput for encrypting the image. Therefore, we select a highly secured symmetric key encryption algorithm AES(Advanced Encryption Standard), in order to decrease the power using retiming and glitch ...
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This paper describes the implementation of a low power and high-speed encryption algorithm with high throughput for encrypting the image. Therefore, we select a highly secured symmetric key encryption algorithm AES(Advanced Encryption Standard), in order to decrease the power using retiming and glitch and operand isolation techniques in four stages, control unit based on logic gates, optimal design of multiplier blocks in mixcolumn phase and simultaneous production keys and rounds. Such procedure makes AES suitable for fast image encryption. Implementation of a 128-bit AES on FPGA of Altera Company has been done, and the results are as follows: throughput, 6.5 Gbps in 441.5 MHz and 130mw power consumption. The time of encrypting in tested image with 32*32 sizes is 1.25ms.
Mojtaba Malboubi; Seyed Mohammad Kargar; Seyed Ali Mousavi
Volume 6, Issue 4 , November 2012
Abstract
Biomedical signals are always corrupted with different noises and interferences. Power Line Interference (PLI) is one of the most important interferences, which decreases the quality of the biomedical signals significantly. In this paper, a novel algorithm, based on adaptive IIR Laguerre filters has ...
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Biomedical signals are always corrupted with different noises and interferences. Power Line Interference (PLI) is one of the most important interferences, which decreases the quality of the biomedical signals significantly. In this paper, a novel algorithm, based on adaptive IIR Laguerre filters has been proposed to eliminate the Power Line Interference (PLI) and its harmonics from Electromyography (EMG) signals. The proposed algorithm has used an internal mathematically constructed reference noise for the adaptive Laguerre filter, thus it is independent of the power line information to eliminate the noise. The Least Mean Square (LMS) algorithm with fuzzy step size has been used to optimize the filter weights which highly increase the filter performance. This proposed filter has consumed fewer computational load than adaptive FIR filters, and also it has shown better stability than IIR filters. Our practical experiments showed that our Laguerre structures could eliminate the PLI from EMG signals successfully and increased the SNR up to 12db that was more efficient than other adaptive algorithms.
Amir Ebrahimi; Ehsan Kargaran; Abbas Golmakani
Volume 6, Issue 4 , November 2012
Abstract
Three new SRAM cells are proposed in this paper. Increasing area overhead is the major concern in SRAM design. One of the new structures is included four transistors instead of six transistors as it is used in conventional 6T-SRAM cell for very high density embedded SRAM applications. The structure of ...
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Three new SRAM cells are proposed in this paper. Increasing area overhead is the major concern in SRAM design. One of the new structures is included four transistors instead of six transistors as it is used in conventional 6T-SRAM cell for very high density embedded SRAM applications. The structure of proposed SRAM employs one word-line and one bit-line during Read/Write operation. The new SRAM cell has smaller size, leakage current and power dissipation in contrast of a conventional six transistor SRAMs. A proposed 4T-SRAM cell has been simulated for 256 cells per bit-line and 128 columns cell for supply voltage of 1.2V. Furthermore, two other new structures are included 10 and 11 transistors. These new structures have been separate read and write process by changing in the structure of conventional 6T SRAM to achieve high Static Noise Margin (SNM). Using 10T and 11T SRAM cells lead to apply 512 cells per bit-line by reducing leakage current technique, while the cell is unavailable. 128 columns cell array has been built to measure the operation of SRAM cell. To have low power dissipation, the supply voltage for 10T and 11T are chosen 0.32V and 0.27V, respectively. Proposed SRAM uses one read bit-line during read operation. Simulation results have been confirmed by HSPICE in 0.13um process.
Ahmad Ghafari; Morteza Razzaz; Seyed Ghodratollah Seifossadat; Seyed Saeedollah Mortazavi
Volume 6, Issue 4 , November 2012
Abstract
In this paper, the influence on the voltage compensation type, active superconducting fault current limiter (ASFCL) is investigated under symmetrical and asymmetrical fault conditions. ASFCL is consisting of three air-core superconducting transformers and a three-phase voltage source converter. In the ...
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In this paper, the influence on the voltage compensation type, active superconducting fault current limiter (ASFCL) is investigated under symmetrical and asymmetrical fault conditions. ASFCL is consisting of three air-core superconducting transformers and a three-phase voltage source converter. In the normal (no fault) state, the flux in air core is compensated to zero, so the ASFCL has no influence on the main circuit. In the case of short circuit, by controlling the amplitude and phase angle of the second winding’s current, the limiting impedance which is in series with the AC main circuit can be regulated, and the fault current will be limited to a certain level. Control strategies consist of fault detection and PWM converter operation is designed. To simplify the design of controllers the mathematical equations can be expressed in synchronous rotating d-q frame. Furthermore, under the condition that the active SFCL is placed behind the relay element, its current-limiting impedance will be added into the measured impedance between the relay and the fault points. As a result, in order to prevent the refused operation of the relay, According to the two different operation modes of the active SFCL, in this paper present the corresponding two modified formulas. Using MATLAB SIMULINK, model of the three phase AC system with ASFCL is created and control strategies test, fault current limiting test, and distance relay operation is investigated.
Saber Izadpanah Tous; Mahmoud Behroozi; Ehsan Kargaran; Hooman Nabovati
Volume 6, Issue 4 , November 2012
Abstract
All oscillators are periodically time varying systems, so to accurate phase noise calculation and simulation, time varying model should be considered. Phase noise is an important characteristic of oscillator design. It defined as the spectral density of the oscillator spectrum at an offset from the center ...
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All oscillators are periodically time varying systems, so to accurate phase noise calculation and simulation, time varying model should be considered. Phase noise is an important characteristic of oscillator design. It defined as the spectral density of the oscillator spectrum at an offset from the center frequency of the oscillator relative to the power of the oscillator. In this paper, we study linear time invariant (LTI) and linear time variant (LTV) model’s to calculate phase noise. Moreover, we propose a simple method for Impulse Sensitivity Function (ISF) calculation. Different oscillators have been selected to evaluate the proposed method. Simulation results show that the proposed method is simpler than other methods, and we can easily simulation ISF.噪聲計算技術使用時變模型摘要所有的振盪器週期時變系統，所以要精確的相位噪聲的計算和模擬，隨時間變化的模式應該被考慮。相位噪聲是振盪器設計的一個重要特徵。它定義為振盪器頻譜中的一個從相對於振盪器的功率的振盪器的中心頻率偏移的頻譜密度。在本文中，我們研究了線性時不變（LTI）和線性時變（LTV）模型來計算相位噪聲。此外，我們提出了脈衝靈敏度函數（ISF）計算的簡單方法。不同振盪器已選定，評估了該方法。仿真結果表明，該方法比其他方法更簡單，我們可以很容易地模擬ISF。
Mehdi Fartaj; Sedigheh Ghofrani
Volume 6, Issue 4 , November 2012
Abstract
Traffic road sign detection is important to a robotic vehicle that automatically drives on roads. As the colors of most traffic road signs are blue and red, in this paper, we use Hue- Saturation- Intensity (HSI) color space for color based segmentation at first. Using important geometrical features, ...
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Traffic road sign detection is important to a robotic vehicle that automatically drives on roads. As the colors of most traffic road signs are blue and red, in this paper, we use Hue- Saturation- Intensity (HSI) color space for color based segmentation at first. Using important geometrical features, the road signs are detected perfectly. After segmentation, it turns to classify every detected road signs. For this purpose, we employ and compare the performance of three classifiers; they are distance to border (DTB), FFT sample of signature, and code matrix. In this work, we use the code matrix as an efficient classifier for the first time. Although the achieved accuracy by code matrix is greater than the two referred classifiers in average, the main advantage is simplicity and so less computational cost.
Sepideh Ebrahimi; Alishir Moradikordalivand
Volume 6, Issue 4 , November 2012
Abstract
In this paper, a Distributed Amplifier (DA) by using HEMT technology for ultra-wideband application is presented. Creation of Distributed integrated circuit has been investigated for approximately seventy years rapidly to developing semiconductor process technologies in the modern IC design. By using ...
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In this paper, a Distributed Amplifier (DA) by using HEMT technology for ultra-wideband application is presented. Creation of Distributed integrated circuit has been investigated for approximately seventy years rapidly to developing semiconductor process technologies in the modern IC design. By using of this method, multiple parallel signals are combined and obtain to increase the bandwidth, enhanced power combining amplitude, and novel design capabilities for IC process. The circuit was designed and simulated in ED02AH technology by using ADS2010. The 4-stage design achieves 15.5 dB of power gain (±0.5 dB) from 3.1 to 10.6 GHz. Reflected power of the input and output from loads matched to 50 Ohm are all below –10 dB over the bandwidth of the device, as is power transmitted from the output to the input. The device is stable for a wide range of input and output loads.
Mojtaba Forooghi; Pezhman Aghaei
Volume 6, Issue 4 , November 2012
Abstract
Soft switching techniques have recently been used for the design of DC-AC converters, in order to achieve better performance, higher efficiency and power density. One of the soft switching techniques applied in inverters is resonant DC links. These topologies have some disadvantage such as irregular ...
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Soft switching techniques have recently been used for the design of DC-AC converters, in order to achieve better performance, higher efficiency and power density. One of the soft switching techniques applied in inverters is resonant DC links. These topologies have some disadvantage such as irregular current peak, large voltage peaks, uncontrollable pulse width, etc. Another soft switching method in inverters is using quasi resonant links, which have PWM modulation capability. In this paper, an inverter with a new quasi resonant parallel DC link with capability EDPWM (Enhanced Double PWM) which uses of single-phase soft switching technique (SPSS) is introduced. This circuit provides the inverter with two to three ranges of PWM control capability, which increases the switching time control is the larger range. Various operational stages of this new quasi resonant DC link and designing process are analyzed. Finally, simulation results of new QPRDCLI and some other samples by PSPICE software are presented to justify the circuit operation.
